// ****************************************************************************** 
// Copyright     :  Copyright (C) 2018, Hisilicon Technologies Co. Ltd.
// File name     :  sdmam_common_regs_reg_offset_field.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1
// Date          :  2013/3/10
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V4.2 
// History       :  xxx 2018/04/10 11:32:32 Create file
// ******************************************************************************

#ifndef __SDMAM_COMMON_REGS_REG_OFFSET_FIELD_H__
#define __SDMAM_COMMON_REGS_REG_OFFSET_FIELD_H__

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT0_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT0_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT1_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT1_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT2_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT2_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT3_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT3_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT4_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT4_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT5_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT5_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT6_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT6_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT7_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT7_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT8_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT8_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT9_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT9_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT10_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT10_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT11_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT11_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT12_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT12_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT13_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT13_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT14_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT14_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT15_LEN    16
#define SDMAM_COMMON_REGS_DFX_EMU_PRESS_CNT15_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF0_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF0_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF1_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF1_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF2_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF2_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF3_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF3_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF4_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF4_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF5_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF5_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF6_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF6_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF7_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF7_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF8_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF8_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF9_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF9_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF10_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF10_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF11_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF11_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF12_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF12_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF13_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF13_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF14_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF14_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF15_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF15_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF16_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF16_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF17_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF17_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF18_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF18_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF19_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF19_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF20_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF20_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF21_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF21_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF22_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF22_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_PROBE_INF23_LEN    32
#define SDMAM_COMMON_REGS_DFX_PROBE_INF23_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_CTRL0_LEN    32
#define SDMAM_COMMON_REGS_DFX_CTRL0_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_CTRL1_LEN    32
#define SDMAM_COMMON_REGS_DFX_CTRL1_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_CTRL2_LEN    32
#define SDMAM_COMMON_REGS_DFX_CTRL2_OFFSET 0

#define SDMAM_COMMON_REGS_AXUSER_BIT0TO31_LEN    32
#define SDMAM_COMMON_REGS_AXUSER_BIT0TO31_OFFSET 0

#define SDMAM_COMMON_REGS_AXUSER_BIT32TO63_LEN    32
#define SDMAM_COMMON_REGS_AXUSER_BIT32TO63_OFFSET 0

#define SDMAM_COMMON_REGS_ATS_REQ_PROT_LEN        3
#define SDMAM_COMMON_REGS_ATS_REQ_PROT_OFFSET     4
#define SDMAM_COMMON_REGS_AXUSER_BIT64TO67_LEN    4
#define SDMAM_COMMON_REGS_AXUSER_BIT64TO67_OFFSET 0

#define SDMAM_COMMON_REGS_ATS_REQ_AXUSER_LEN    32
#define SDMAM_COMMON_REGS_ATS_REQ_AXUSER_OFFSET 0

#define SDMAM_COMMON_REGS_SDMA_VERSION_ID_LEN    32
#define SDMAM_COMMON_REGS_SDMA_VERSION_ID_OFFSET 0

#define SDMAM_COMMON_REGS_SNAP_EN_LEN       1
#define SDMAM_COMMON_REGS_SNAP_EN_OFFSET    1
#define SDMAM_COMMON_REGS_CNT_CLR_CE_LEN    1
#define SDMAM_COMMON_REGS_CNT_CLR_CE_OFFSET 0

#define SDMAM_COMMON_REGS_DFX_TEST_CTRL_LEN    32
#define SDMAM_COMMON_REGS_DFX_TEST_CTRL_OFFSET 0

#define SDMAM_COMMON_REGS_FEATURE_EN_LEN    32
#define SDMAM_COMMON_REGS_FEATURE_EN_OFFSET 0

#endif // __SDMAM_COMMON_REGS_REG_OFFSET_FIELD_H__
